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FAQ
Q: I have an Intel i7-11800H CPU. Is it possible to upgrade it?
A: No. BGA processors, like this one, are soldered on a board, as a result, upgrading or replacing them is very very difficult.
Core i7-11800H Overclocking
Sorry, we do not have overclocking data for the processor at this time.
CPU ID information for the Core i7-11800H
Detailed characteristics of processor's internals, including x86
instruction set extensions and individual instructions, high- and low-level
technologies, are listed below. This list was acquired from an actual
Intel Core i7 Mobile i7-11800H processor with the help of the x86 CPUID instruction. Any
discrepancies between CPUID features and official specifications are
likely due to some features being disabled in BIOS, or due to a bug in
our CPUID decoding algorithm.
Different steppings of Intel processors may also have slightly different features.
Our CPUID database contains 4 records for this microprocessor. See all submitted records.
Use our CPU identification tool to check features of your processor.
| Submission details |
| Manufacturer: | Intel | Measured frequency: | 2304 MHz |
| CPU Family: | Core i7 Mobile | Comment: | |
| Processor Number: | i7-11800H | |
| Part number (supplied): | FH8069004352018 | Submitted by: | sosuteno |
| Part number (guessed): | FH8069004352018 | Submitted on: | |
| S-Spec Number: | | CWID version: | 0.5 |
General information
| Vendor: | GenuineIntel |
| Processor name (BIOS): | 11th Gen Intel(R) Core(TM) i7-11800H @ 2.30GHz |
| Cores: | 8 |
| Logical processors: | 16 |
| Base frequency: | 2300 MHz |
| Maximum frequency: | 4600 MHz |
| Bus / reference frequency: | 100 MHz |
| Processor type: | Original OEM Processor |
| CPUID signature: | 806D1 |
| Family: | 6 (06h) |
| Model: | 141 (08Dh) |
| Stepping: | 1 (01h) |
| TLB/Cache details: | 64-byte Prefetching |
Cache details
| Cache: |
L1 data |
L1 instruction |
L2 |
L3 |
| Size: |
8 x 48 KB |
8 x 32 KB |
8 x 1 MB |
24 MB |
| Associativity: |
12-way set associative |
8-way set associative |
20-way set associative |
12-way set associative |
| Line size: |
64 bytes |
64 bytes |
64 bytes |
64 bytes |
| Comments: |
Direct-mapped |
Direct-mapped |
Non-inclusive Direct-mapped |
Non-inclusive Shared between all cores |
Supported instructions
| Instruction set extensions | Additional instructions |
| MMX |
ADCX/ADOX instructions |
| SSE |
Advanced Bit manipulation |
| SSE2 |
CLFLUSH |
| SSE3 |
CLFLUSHOPT |
| SSSE3 |
CLWB |
| SSE4.1 |
CMOV |
| SSE4.2 |
CMPXCHG16B |
| AES |
CMPXCHG8B |
| AVX |
Enhanced REP MOVSB/STOSB |
| AVX2 |
FXSAVE/FXRSTORE |
| BMI1 |
INVPCID |
| BMI2 |
MONITOR/MWAIT |
| F16C |
MOVBE |
| FMA |
MOVDIR64B |
| GFNI |
MOVDIRI |
| Supervisor-Mode Access Prevention and CLAC / STAC instructions |
PCLMULDQ |
| Supervisor Mode Execution Protection |
POPCNT |
| AVX-512 (AVX512 Foundation) |
PREFETCH/PREFETCHW |
| AVX-512 (AVX512BITALG) |
RD/WR FSGSBASE instructions |
| AVX-512 (AVX512BW) |
RDRAND |
| AVX-512 (AVX512CD) |
RDSEED |
| AVX-512 (AVX512DQ) |
RDTSCP |
| AVX-512 (AVX512IFMA) |
Read Processor ID |
| AVX-512 (AVX512VBMI) |
SYSENTER/SYSEXIT |
| AVX-512 (AVX512VBMI2) |
XSAVE/XRESTORE states |
| AVX-512 (AVX512VL) |
XSETBV/XGETBV are enabled |
| AVX-512 (AVX512VNNI) |
|
| AVX-512 (AVX512VP2INTERSECT) |
|
| AVX-512 (AVX512VPOPCNTDQ) |
|
| Secure Hash Algorithm extensions (SHA) |
|
Integrated features and technologies
| Major features | Other features |
| On-chip Floating Point Unit |
1 GB large page support |
| 64-bit / Intel 64 |
36-bit page-size extensions |
| NX bit/XD-bit |
64-bit debug store |
| Hyper-Threading Technology |
Advanced programmable interrupt controller |
| Intel Virtualization |
CPL qualified debug store |
| Turbo Boost |
Clock modulation duty cycle extension |
| Turbo Boost 3.0 |
Debug store |
| Enhanced SpeedStep |
Debugging extensions |
| |
Digital Thermal Sensor capability |
| |
Extended xAPIC support |
| |
Intel Processor Trace |
| |
Key Locker |
| |
LAHF/SAHF support in 64-bit mode |
| |
Machine check architecture |
| |
Machine check exception |
| |
Memory-type range registers |
| |
Model-specific registers |
| |
Package thermal management |
| |
Page attribute table |
| |
Page global extension |
| |
Page-size extensions (4MB pages) |
| |
Pending break enable |
| |
Perfmon and Debug capability |
| |
Physical address extensions |
| |
Platform Quality of Service Enforcement |
| |
Power Limit Notification capability |
| |
Process context identifiers |
| |
Protection keys for user-mode pages |
| |
Self-snoop |
| |
TSC rate is ensured to be invariant across all states |
| |
Thermal monitor |
| |
Thermal monitor 2 |
| |
Thermal monitor and software controlled clock facilities |
| |
Time stamp counter |
| |
Timestamp counter deadline |
| |
User-mode instruction prevention |
| |
Virtual 8086-mode enhancements |
| |
xTPR Update Control |
CPUs, related to Intel Core i7-11800H
Please see Related "Tiger Lake" processors for socket BGA1787 page for the enhanced list with extra options.
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• Background color of specs and features indicate whether they are better or worse than similar spec/feature of the Core i7-11800H
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• Features abbreviations:
TXT - Trusted Execution technology
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Comments (1)
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Additional information
The 11800H has a partially unlocked core clock multiplier, allowing up to 4 turbo bins to be applied across its existing turbo behavior. Its integrated graphics core and memory controller may or may not feature fully unlocked multipliers.
If all turbo bins are utilized, these would be the new maximum core clock frequencies:
• 1~2 cores: 5.0 GHz
• 3~5 cores: 4.9 GHz
• 6 cores: 4.8 GHz
• 7 cores: 4.7 GHz
• 8+ cores: 4.6 GHz