Silicon-micromachined microchannel plates

John Steinbeck

Outline

Silicon-micromachined microchannel plates

2000, Nuclear Instruments & Methods in Physics Research Section A-accelerators Spectrometers Detectors and Associated Equipment

Abstract

Microchannel plates (MCP) fabricated from standard silicon wafer substrates using a novel silicon micromachining process, together with standard silicon photolithographic process steps, are described. The resulting SiMCP microchannels have dimensions of &0.5 to &25 m, with aspect ratios up to 300, and have the dimensional precision and absence of interstitial defects characteristic of photolithographic processing, compatible with positional matching to silicon electronics readouts. The open channel areal fraction and detection e$ciency may exceed 90% on plates up to 300 mm in diameter. The resulting silicon substrates can be converted entirely to amorphous quartz (qMCP). The strip resistance and secondary emission are developed by controlled depositions of thin "lms, at temperatures up to 12003C, also compatible with high-temperture brazing, and can be essentially hydrogen, water and radionuclide-free. Novel secondary emitters and cesiated photocathodes can be high-temperature deposited or nucleated in the channels or the "rst strike surface. Results on resistivity, secondary emission and gain are presented.

FAQs

What advantages do silicon microchannel plates offer over glass MCPs?add

The study reveals that silicon MCPs achieve higher dimensional precision and eliminate fabrication defects, unlike glass variants. Additionally, SiMCPs support processing at elevated temperatures up to 1400°C, enhancing performance and longevity.

How do pore sizes and aspect ratios of SiMCPs impact performance?add

The findings indicate that SiMCPs can have adjustable pore sizes between 0.5 and 25 micrometers with aspect ratios exceeding 300:1, leading to significantly improved image resolution. High open pore fractions of over 95% also contribute to enhanced detection efficiency.

What methods were used to achieve electrical isolation in SiMCPs?add

The research demonstrates a two-step isolation strategy using thermal oxidation to create an oxide layer plus a subsequent deposition of a resistive strip layer. This allows effective electrical isolation, maintaining secondary electron gain performance.

What secondary emission performance was observed in the SiMCP materials?add

Secondary emission yields reached up to 4 with optimized Si/SiOv films at incident energies between 300 and 400 eV. Moreover, the study highlights the high gain potential with coatings like crystalline diamond, achieving secondary gains between 60 to 80 at 1-2 keV.

How do SiMCPs facilitate compatibility with cesiated photocathodes?add

The study finds that SiMCPs are fully chemically compatible with cesiated cathodes, allowing for direct deposition on MCP surfaces. This compatibility may confer both performance and cost advantages over traditional lead glass MCPs.

Figures (14)

Fig. 1. Micromachined microchannel matrix for a precision SiMCP, fabricated at NanoSciences Corporation. The square channels are on a 6 um spacing, with a side dimension of 3 pm. The top surface has been micromachined to a tapered blade point to enhance the collection efficiency of incident photo- electrons; approximately 95% of the surface is open.

Fig. 3. Cross-section views of a section of an extremely thin-wall silicon SiMCP substrate converted to amorphous quartz. Note that the walls in the channels are extremely smooth; more than 90% of the silicon is removed. Fiducial bar = 2.5 um Fig. 2. Left. Edge view of the cross-section of a dense array of 6 um channels with the micromachining process halted 368 jum into a 520 um thick silicon wafer, the channels are spaced on 8 jum centers; Right: top view of the wafer showing the 6 um wide channel openings.

the coatings necessary for reproducing the func- tionality of the reduced lead glass microchannel plate surface is shown in Fig. 6. The insulating layer provides the isolation necessary to keep the gener- ated secondary electrons from being shunted by the conducting silicon substrate. The strip resistance is a weakly conducting layer that re-supplies charge to the secondary emission layer to maintain the secondary electron gain.

Fig. 4. Elevation (top) and Plan (bottom) views of a partially completed p-type silicon wafer SiMCP substrate using Nano- Sciences’ proprietary high-aspect ratio high rate silicon micro- machining processes. The 10 um on 11.25 um pitch SiMCP channels are chevroned at about 8° to the wafer surface plane.

Fig. 6. Illustration of the coating system necessary on a silicon- based MCP in order to replicate the functionality of the surface layers on a reduced lead glass-based MCP. Fig. 5. Fig. S(a,b). Photographs of a 4” (10 cm) silicon wafer with a full array of micromachined pores. Left: back-illuminated, showing the light transmission in air. Right: flash-illuminated showing the diffraction pattern from the holes. (c). Diced-out 1 cm x 1 cm SiMCP section, back-illuminated with a spotlight.

Fig. 7. Cross-sections through a single-channel wall of a frac- tured, processed SiMCP plate showing the silicon core, thermal oxide and CVD-deposited polysilicon and SiO, coatings in the silicon MCP structure. The resistivity of the polysilicon film was 85 x 10° Q cm.

$Fig. 8. Cross-sections through the channel walls of a fractured, processed Si-MCP substrate showing the layers deposited on the wall surface, similar to Fig. 7, illustrating the flat, opaque Si core profile, encased in the partial silcon oxide. (Orientation 90° from previous figure. Defect on right is a debris particle from fracturing.)$

Fig. 8. Cross-sections through the channel walls of a fractured, processed Si-MCP substrate showing the layers deposited on the wall surface, similar to Fig. 7, illustrating the flat, opaque Si core profile, encased in the partial silcon oxide. (Orientation 90° from previous figure. Defect on right is a debris particle from fracturing.)

Fig. 9. Cross-sections through a single-channel wall of a frac- tured, processed SiMCP plate showing the thermal oxide and CVD-deposited polysilicon, thick silicon nitride and SiO, coat- ings in the Nsci SiMCP structure.

Fig. 10. The I-V characteristics of a Galileo and Philips glass MCPs along with an example of a Si- MCP, shown on a semi-log plot for direct comparison (vertical scale = nA). Effective resistance characteristics both higher and lower for the SiMCP have been achieved. Note the similarity in the curvatures.

Fig. 11. Secondary electron yield measured as a function of the incident electron energy for CVD deposited polysilicon/SiO,. film: having various resistivities and post-deposition heat treatments.

Fig. 12. Electron gain measured as a function of applied voltage for a single silicon microchannel in a SiMCP with an aspect ratio « = 50 (squares), obtained in an electron microscope. Solid lines are theoretical calculations of gain for SiMCP having aspect ratios of « = 50, 35, and 20.

Fig. 13. Test image tube structure for silicon MCPs. The top picture shows a photograph of the assembled tube (12 in./30 cm ruler in foreground). The bottom picture shows the image of the standard Air Force test pattern at the output of the tube. These results show that the silicon MCP is capable of resolving 89 line pairs/mm (limited at present by the readout screen).

Fig. 14. Diamond surface deposits on Si-MCP substrates to enhance first strike gain. The left photo shows a plan view of the coated substrate and the right photo shows a cross-section through the MCP walls illustrating the tapering of the deposit. At 1-2 kV, the boron-doped diamond has gain between 60 and 80. CP. Beetz et al. / Nuclear Instruments and Methods in Physics Research A 442 (2000) 443-451

Nuclear Instruments and Methods in Physics Research A 442 (2000) 443 } 451 Silicon-micromachined microchannel plates Charles P. Beetz, Robert Boerstler, John Steinbeck, Bryan Lemieux, David R. Winn* NanoSciences Corporation, 83 Prokop Road, Oxford, CT 06478, USA Fairxeld University, Department of Physics, Fairxeld, CT 06430-5195, USA Abstract Microchannel plates (MCP) fabricated from standard silicon wafer substrates using a novel silicon micromachining process, together with standard silicon photolithographic process steps, are described. The resulting SiMCP microchan- nels have dimensions of &0.5 to &25 m, with aspect ratios up to 300, and have the dimensional precision and absence of interstitial defects characteristic of photolithographic processing, compatible with positional matching to silicon electronics readouts. The open channel areal fraction and detection e$ciency may exceed 90% on plates up to 300 mm in diameter. The resulting silicon substrates can be converted entirely to amorphous quartz (qMCP). The strip resistance and secondary emission are developed by controlled depositions of thin "lms, at temperatures up to 12003C, also compatible with high-temperture brazing, and can be essentially hydrogen, water and radionuclide-free. Novel secondary emitters and cesiated photocathodes can be high-temperature deposited or nucleated in the channels or the "rst strike surface. Results on resistivity, secondary emission and gain are presented.  2000 Elsevier Science B.V. All rights reserved. 1. Introduction: Glass microchannel plates (MCP) su!er from operation and fabrication at relatively low temper- atures (precluding most CVD activation or brazed mountings), evolution of hydrogen ions from the surface (potential photocathode degradation), gain degradation, and short gain-lifetime at high inci- dent electron #uxes [1,2]. Spatial defects due to the "ber-bundling process lower the e!ective spatial resolution and image uniformity and limit the abil- ity to couple the MCP to silicon-device readouts, and pixel sizes are usually larger than &5}6 m * Corresponding author. Tel.: #1-203-254-4000; fax: #1- 203-254-4277. E-mail address: NanoSystem@aol.com (C.P. Beetz), winn@fair1.fair"eld.edu (D.R. Winn)  www.nanosciences.com. for commercially viable products. Relatively low pore areal packing fractions ((60}65% open pores) create an upper limit on detection e$ciency, near this areal open fraction. Glass MCP are self-radioactive and non-radiation hard at levels incompatible with some very low light or space applications. Lastly, they are expensive and un- available in very large image formats. We have therefore looked at silicon micromachining to develop a new type of Si- and quartz-MCP materials systems, which can take advantage of the mass production technologies developed by the semi- tool and semiconductor industry. 2. Silicon MCP substrates Silicon microchannel plates (SiMCP) have been fabricated using a photolithographically initiated 0168-9002/00/$ - see front matter  2000 Elsevier Science B.V. All rights reserved. PII: S 0 1 6 8 - 9 0 0 2 ( 9 9 ) 0 1 2 7 1 - 1

Fig. 1. Micromachined microchannel matrix for a precision SiMCP, fabricated at NanoSciences Corporation. The square channels are on a 6 m spacing, with a side dimension of 3 m. The top surface has been micromachined to a tapered blade point to enhance the collection e$ciency of incident photo- electrons; approximately 95% of the surface is open. proprietary micromachining process developed at NanoSciences Corporation (NSci). The placement, size and pore uniformity of the silicon MCP sub- strate channels therefore have dimensional pre- cisions greatly exceeding that of glass-"ber-based MCP. Figs. 1}4 show SEM micrographs of four di!erent forms of these substrates, and Fig. 5a}c show optical photographs of the SiMCP. The com- plete elimination of MCP defects (for example, due to misplacement or defomation of the glass "bers in a boule) is achievable, and the microchannel out- puts can be placed with precision with respect to potential lithographically patterned readouts. Pore diameters are fully adjustable between 0.5 and 25 m, with high aspect ratios ("hole length/hole diameter) } up to 300:1 has been achieved with 3 m holes } a possible theoretical limit is '2000:1. Large SiMCP diameters are possible, up to the size of available silicon wafers } limited with presently commercially viable silicon wafers to &30 cm (12) diameter SiMCP plates. At present, SiMCP of 10 cm diameter have been pro- duced at NSci, limited only by the installed photoli- thographic equipment (4 wafer fab). The holes can be square, and '90% open area; micromachining can taper the hole entrances as shown in Fig. 1. These SiMCP substrates can be vacuum-baked at temperatures &12003C, and brazed at similar elevated temperatures, much hotter than those pos- sible with glass MCP, or converted entirely or partially to oxide (amorphous quartz } qMCP) for even higher-temperature processing. Chevroning up to 83 to the surface plane have been demon- strated, as shown in Fig. 4. 3. Electrical isolation, strip resistance, and secondary emission coatings Because of these temperature characteristics and the silicon-based substrate, CVD processes can be used to activate the SiMCP or qMCP plates with anhydrous, high-temperature secondary-emission materials or with photocathodes. Since silicon is semiconducting and has a relatively small band gap &1.07 eV, it is not possible to develop high enough electric "elds in the channels for generating electron gain. Even for intrinsic silicon 444 C.P. Beetz et al. / Nuclear Instruments and Methods in Physics Research A 442 (2000) 443 } 451

Fig. 2. Left. Edge view of the cross-section of a dense array of 6 m channels with the micromachining process halted 368 m into a 520 m thick silicon wafer, the channels are spaced on 8 m centers; Right: top view of the wafer showing the 6 m wide channel openings. Fig. 3. Cross-section views of a section of an extremely thin-wall silicon SiMCP substrate converted to amorphous quartz. Note that the walls in the channels are extremely smooth; more than 90% of the silicon is removed. Fiducial bar"2.5 m whose resistivity is &10  cm, the resistance of a 1 cm, 0.36 mm thick plate silicon MCP having 6 m channel openings on 8 m centers, "60 (for example), would draw about 1200 W at 1 KV. Therefore, bare silicon plates cannot be used due to excessive conductivity. A strategy of coating the silicon with an insulat- ing coating, then a strip resistance layer and then a secondary emission layer has been employed to circumvent this problem. A schematic diagram of the coatings necessary for reproducing the func- tionality of the reduced lead glass microchannel plate surface is shown in Fig. 6. The insulating layer provides the isolation necessary to keep the gener- ated secondary electrons from being shunted by the conducting silicon substrate. The strip resistance is a weakly conducting layer that re-supplies charge to the secondary emission layer to maintain the secondary electron gain. The isolation layer strategy was initially dis- cussed by Tasker et al. [3,4] in the development of silicon-based MCP and as for coatings for single- channel multipliers. They developed a successful coating system for quartz tube single-channel multipliers that employed a slightly oxidized poly- silicon layer that provided both the strip resistance and secondary emission surface. Electrical isolation and strip resistance of the silicon MCP is accomp- lished using a two-step isolation procedure. Since the Si-MCP substrate is conductive, the strip resistance layer must "rst be insulated from the Si substrate as illustrated in Fig. 6. The isolation can be accomplished by thermally oxidizing the Si- MCP substrate and/or depositing an insulating layer. The insulating layer thickness depends on the bias voltage stand-o! required. After the SiMCP substrate wafer has been diced into the desired SiMCP shapes, they are inserted into a high-tem- perature wet oxygen oxidation furnace to grow a thick (&1 m or more) oxide layer on the top C.P. Beetz et al. / Nuclear Instruments and Methods in Physics Research A 442 (2000) 443 } 451 445

Fig. 4. Elevation (top) and Plan (bottom) views of a partially completed p-type silicon wafer SiMCP substrate using Nano- Sciences' proprietary high-aspect ratio high rate silicon micro- machining processes. The 10 m on 11.25 m pitch SiMCP channels are chevroned at about 83 to the wafer surface plane. surfaces of the outer frame of the device as well as on the walls of the channels in the device. Special post-processing deposition is also used to form a frame for mechanically handling the SiMCP, whilst maintaining surface #atness. The silicon oxidsing can be complete, forming a quartz MCP (qMCP), or partial, preserving an optically opaque channel wall (other applications). The strip resistance for single-channel electron multipliers that are typically &1 m in diameter and &60 m in length needs to be &10 's [3,4]. For a strip resistance layer &0.1 m in thickness, the resistivity needs to be &50  cm, a value that is straight forward to obtain by chemical vapor deposition. In contrast, for example, a square cm SiMCP of 6 m microchannels on 8 m centers, 360 m long with a &0.1 m thick strip resistance layer, requires the polysilicon layer to have a resis- tivity of &10  cm since the resistance of the individual channels are all in parallel with one another. Polysilicon can be deposited having resis- tivity over the range 1}10  cm using plasma chemical vapor deposition [5], reactive sputtering [6] and electron beam evaporation [7]. Coatings based on CVD techniques are desired since uniform coatings can be produced on channels of high as- pect ratio. It is possible to deposit very high resis- tivity amorphous Si and extremely "ne grain polysilicon "lms by CVD, and doping with nitro- gen and/or oxygen. Films having resistivity on the order of 10  cm have been achieved using the thermal decomposition of dichlorosilane in ammo- nia at temperatures &8503C. Uniform coatings are also readily achieved on high-aspect ratio chan- nels ¸/d'60 employing low-pressure deposition atmospheres &10}500 mTorr. A cross-section through a wall of some processed Si-MCP are shown in Figs. 7 and 8 . The cross- section shows the Si core that remains after partial thermal oxidation, and the polysilicon coating that provides the strip resistance. The oxide was grown by thermal oxidation in a #owing atmosphere of water vapor in oxygen [8]. The polysilicon can also be doped with nitrogen; a thin deposit of silicon nitride helps enable the smooth nucleation of the polycrystalline Si/SiO  "lm on the SiO  layer. A thick silicon nitride interfacing layer is shown in Fig. 9 (note that silicon nitride also has a high SE yield). An I}< curve for a low-current doped poly- silicon-coated Si-MCP substrate &2 cm diameter is shown in Fig. 10, compared with other glass MCP; much higher or lower plate resistances are easily possible. Secondary emission is obtained from thin "lms of SiO  and SiO  (as in normal lead glass MCP) although CVD nucleating on silicon, silicon diox- ide or silicon nitride o!ers many other high perfor- mance alternative SE materials systems, such as silicon silicides, metal oxides, diamond, GaP or cesiated semiconducting materials, to be described 446 C.P. Beetz et al. / Nuclear Instruments and Methods in Physics Research A 442 (2000) 443 } 451

Fig. 7. Cross-sections through a single-channel wall of a frac- tured, processed SiMCP plate showing the silicon core, thermal oxide and CVD-deposited polysilicon and SiO  coatings in the silicon MCP structure. The resistivity of the polysilicon "lm was 8510  cm. Fig. 8. Cross-sections through the channel walls of a fractured, processed Si-MCP substrate showing the layers deposited on the wall surface, similar to Fig. 7, illustrating the #at, opaque Si core pro"le, encased in the partial silcon oxide. (Orientation 903 from previous "gure. Defect on right is a debris particle from fracturing.) Fig. 9. Cross-sections through a single-channel wall of a frac- tured, processed SiMCP plate showing the thermal oxide and CVD-deposited polysilicon, thick silicon nitride and SiO  coat- ings in the Nsci SiMCP structure. values calculated from the applied voltage, mea- sured SE yield data, and the pore aspect ratio  as G"(A</2<  ) (1) with "4(<  /<) (2) and A given by the SE yield data  from "A<  , (3) and < is the total channel voltage, <  is the initial energy of the secondary electron, &1 eV. (The gain may be somewhat low due to saturation from using an SEM electron beam for the incident electrons.) The absence of water or hydrogen in the SiMCP materials system may help with electro-optic device longevity (especially the photocathode) when using these silicon-based MCP, in contrast to glass-based MCP. Lifetime tests are not complete; however, SiMCP are repeatably able to cycle between air and vacuum with little change in performance. The silicon can also be fully oxidized to amorph- ous quartz, for SE activation processing or strip resistance processing up to 14003C. 3.1. Image tube A silicon MCP has been installed in a cesiated photocathode imaging tube, and have demon- strated spatial resolution of at least 89 lp/mm } lim- ited by the resolution of the readout. Fig. 13 shows a tube assembly and the imaged test pattern. 448 C.P. Beetz et al. / Nuclear Instruments and Methods in Physics Research A 442 (2000) 443 } 451

Fig. 12. Electron gain measured as a function of applied voltage for a single silicon microchannel in a SiMCP with an aspect ratio "50 (squares), obtained in an electron microscope. Solid lines are theoretical calculations of gain for SiMCP having aspect ratios of "50, 35, and 20. Fig. 13. Test image tube structure for silicon MCPs. The top picture shows a photograph of the assembled tube (12 in./30 cm ruler in foreground). The bottom picture shows the image of the standard Air Force test pattern at the output of the tube. These results show that the silicon MCP is capable of resolving 89 line pairs/mm (limited at present by the readout screen). 3.2. Direct photocathode deposition An important feature of SiMCP or qMCP sub- strates are that they are fully temperature and espe- cially chemically compatible with cesiated cathodes fabricated directly on the surface or walls of the MCP substrate, unlike leaded-glass-based MCP, and a performance and/or cost advantage in many applications. 3.3. High secondary emission xrst strike We have also demonstrated deposition of cry- stalline diamond on the top surface of a SiMCP substrate as a very high "rst strike SEM surface (secondary gain &60}80 at 1}2 keV incident photoelectrons). Fig. 14 shows diamond deposition on the SiMCP front surfaces and throats. Nuclea- tion of other high SE materials such as GaP is in principle also feasible with this substrate material. 3.4. Additional applications of SiMCP substrates Additional uses of silicon and amorphous quartz MCP include scintillating X-ray imaging plates, X-ray through IR semiconductor imaging de- tectors, solar cells, "ber face plates, #at-panel dis- plays, #uid "lters, biomedical diagnostics, drug delivery systems, e-beam devices, and a variety of 3-D electronics. 4. Summary of NSci Si-MCP features  Pore sizes/resolution: between &0.5}25 m.  Pore size uniformity: ($0.5% in x and y.  Pore placement/position uniformity: ($0.5 m in x}y over 25 mm plate.  Absent/missing/displaced pores: none.  Aspect ratios: may exceed 300:1.  Open pore areal fraction/detection e$ciency: '95% with tapered channel input. 450 C.P. Beetz et al. / Nuclear Instruments and Methods in Physics Research A 442 (2000) 443 } 451

Fig. 14. Diamond surface deposits on Si-MCP substrates to enhance "rst strike gain. The left photo shows a plan view of the coated substrate and the right photo shows a cross-section through the MCP walls illustrating the tapering of the deposit. At 1}2 kV, the boron-doped diamond has gain between 60 and 80.  Plate sizes: to 90 mm diameter now, extendable to &300 mm (12 wafer substrates).  Chevron: up to 83 tilt demonstrated.  Bake-out temperatures: (12003C SiMCP, (14003 Q-MCP.  Plate resistance/current: adjustable from 1K}10 M/cm.  Activation processes: CVD, electroplating, gas, liquid and phase reactants (others).  SE materials: silicon oxides, metal oxides and silicides, diamond, GaP (others).  Compatible with direct-front-surface deposited cesiated photocathodes.  Compatible with high-temperature deposition of high SE "rst strike materials.  Compatible with high-temperature metal/ce- ramic brazing.  Low or negligible hydrogen or water content.  Low or negligible self-radioactivity possible.  High radiation resistance.  Fully compatible with silicon lithographically patterned readout, silicon processing.  Fully or partially oxidizable to amorphous quartz.  Gain: comparable to leaded-glass MCP.  Optically opaque channel walls if not fully oxi- dized. References [1] B. Sandel et al., Appl. Opt. 16 (1977) 1435. [2] F. Bennett, D. Thorpe, J. Phys. E 3 (1970) 241. [3] G.W. Tasker, J.R. Horton, J.J. Fijol, Mater. Res. Soc. Proc. 192 (1990) 459. [4] G.W. Tasker, J. R. Horton, US Patent 5,378,960, 1995. [5] P. Sichanugrist, T. Yoshida, Y. Ichikawa, H. Sakai, J. Non-Cryst. Solids 164 (1993) 1081. [6] W.T. Pawlewicz, J. Appl. Phys. 49 (1978) 5595. [7] J. Sangrador, I. Esquivias, T. Rodriguez, J. Sanz-Maudes, Thin Solid Films 125 (1985) 79. [8] G. Tasker et al., SPIE Proc. V2640 (1995) 58. [9] H. Seiler, J. Appl. Phys. 54 (11) (1983) R1. [10] J. Fijol et al., Appl. Surf. Sci 48/49 (1991) 464. [11] G. Tasker et al., Thin-"lm amorphous silicon dynodes for electron multiplication, MRS Symposium, Vol. 192, (1990), 459 p. C.P. Beetz et al. / Nuclear Instruments and Methods in Physics Research A 442 (2000) 443 } 451 451

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References (11)

B. Sandel et al., Appl. Opt. 16 (1977) 1435.
F. Bennett, D. Thorpe, J. Phys. E 3 (1970) 241.
G.W. Tasker, J.R. Horton, J.J. Fijol, Mater. Res. Soc. Proc. 192 (1990) 459.
G.W. Tasker, J. R. Horton, US Patent 5,378,960, 1995.
P. Sichanugrist, T. Yoshida, Y. Ichikawa, H. Sakai, J. Non-Cryst. Solids 164 (1993) 1081.
W.T. Pawlewicz, J. Appl. Phys. 49 (1978) 5595.
J. Sangrador, I. Esquivias, T. Rodriguez, J. Sanz-Maudes, Thin Solid Films 125 (1985) 79.
G. Tasker et al., SPIE Proc. V2640 (1995) 58.
H. Seiler, J. Appl. Phys. 54 (11) (1983) R1.
J. Fijol et al., Appl. Surf. Sci 48/49 (1991) 464.
G. Tasker et al., Thin-"lm amorphous silicon dynodes for electron multiplication, MRS Symposium, Vol. 192, (1990), 459 p.

Silicon-micromachined microchannel plates

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