授過課程

• 組合語言與計算機組織
• 電子電路學
• VLSI測試專題
• 超大型積體電路測試與設計

研究領域

• 超大型積體電路測試
• 容錯計算

主要經歷

• 銘傳大學廣電系助理教授
• 交通部電信總局專員

期刊論文

• Lung-Jen Lee, Wang-Dauh Tseng, Rung-Bin Lin, and Cheng-Ho Chang, 2012, "2n pattern run-length for test data compression," IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, (accepted)
• Lung-Jen Lee, Wang-Dauh Tseng, and Rung-Bin Lin, 2012, "Reduction of test data volume and test application time by scan chain disabling technique," Journal of Chinese Institute of Engineer, (accepted)
• Lung-Jen Lee, Wang-Dauh Tseng, and Rung-Bin Lin, 2011, "Mismatch Address Indexing For Test Data Compression," Journal of Chinese Institute of Engineer, Vol. 34:8, pp. 1035 -1045. (SCI)
• Lung-Jen Lee, Wang-Dauh Tseng, and Rung-Bin Lin, 2011, "An Internal Pattern Run-length Methodology for Test Data Compression," ETRI Journal, Vol. 33, No. 3, pp. 374-381. (SCI)
• Lung-Jen Lee, Wang-Dauh Tseng, and Rung-Bin Lin, 2011, "Reduction of Test Data Volume and Test Application Time by Scan Chain Disabling Technique," Journal of Chinese Institute of Engineer, (accepted). (SCI)
• Wang-Dauh Tseng, Lung-Jen Lee, and Rung-Bin Lin, 2010, "Reduction of Power Dissipation During Scan Testing by Test Vector Ordering," Journal of Chinese Institute of Engineer, Vol. 33, No. 2, pp. 263-270. (SCI)
• Wang-Dauh Tseng, Lung-Jen Lee, and Rung-Bin Lin, 2010, July, "Deterministic Built-in Self-Test Using Multiple Linear Feedback Shift Registers for Test Power and Test Volume Reduction," IET Computers & Digital Techniques, Vol. 4, Issue 4, pp. 317-324. (SCI)
• Wang-Dauh Tseng and Lung-Jen Lee, 2010, "Test Data Compression using Multi-Dimensional Pattern Run-Length Codes," Journal of Electronic Testing: Theory and Applications, Vol. 26, No. 3, pp. 393-400. (SCI)
• Wang-Dauh Tseng, I-Shyan Hwang, Long-Len Lee and Cheng-Zen Yang, 2009, 10, "Clique-partitioning connectionsscheduling with faulty switches in dilated Benes network," Journal of the Chinese Institute of Engineers, Vol. 32, No. 6. (SCI)
• Lung-Jen Lee, Wang-Dauh Tseng, and Rung-Bin Lin, 2008, 05, "Power reduction during scan testing based on multiple capture technique," IEICE Transaction on Electronics, E91-C, pp. 798-805. (SCI)
• Wang-Dauh Tseng, 2007, 02, "Generation of primary input blocking pattern for power minimization during scan testing," Journal of Electronic Testing: Theory and Applications, 23, pp. 75-84. (SCI)
• I-Shyan Hwang, Ren-Yuan Cheng, and Wang-Dauh Tseng, 2007, 08, "A novel dynamic multiple rings-based local restoration for one-to-multipoint multicast traffic in WDM mesh networks," Photonic Network Communications, Vol. 14, No. 1, pp. 23-33. (SCI)
• I-Shyan Hwang, Meng-Yuan Tu, Wang-Dauh Tseng, and Zen-Der Shyu, 2006, 11, "A novel dynamic fault restoration mechanism using cluster allocation approach in WDM mesh networks," Computer Communications, Vol. 29, No. 18, pp. 3921-3932. (SCI)
• Wang-Dauh Tseng, 2005, Sept., "Scan chain ordering technique for switching activity reduction during scan test," IEE Proceedings- Computers and Digital Techniques, Vol. 152, No. 5, pp. 609-617. (SCI)

研究計畫