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[DEPRECATED] ASRock Rack EP2C602 Install Guide for Sierra and High Sierra

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teamawesome

teamawesome

Joined
Jan 28, 2018
Messages
128
Motherboard
ASRock EP2C602
CPU
2 x E5-2680 v2
Graphics
EVGA 980 Classified
Mobile Phone
  1. iOS
jlanot said:
My bluetooth is ABWB 802.11AC, Bluetooth 4.0 WI-FI PCI Express (PCI-E)-Carte Combo BCM94360CD Hackintosh (pour MAC OS X) aéroport ordinateurs
and the USB: [Auto alimentée]Inateck KT4006 Carte Contrôleur USB 3.0 2 ports PCI Express

The Fresco FL1100 is supported out of the box. What is not functioning with the USB3? Mine "just works".
With regards to WiFI, check this out. Confirm its the right chips, etc.

Since the build itself is working, I suggest using the rest of the forums to search or ask advice with regards to these add-on cards. Wireless adapters and USB 3 add-ons is really outside the scope of this thread.
 
jlanot

jlanot

Joined
May 14, 2017
Messages
67
Motherboard
ASROCK EP2C602
CPU
2x E5 2680 v2
Graphics
RX 5700 XT
Mac
  1. MacBook Pro
Mobile Phone
  1. iOS
Okay thanks, I never had any problem with bluetooth though. USB 3 works, but the mouse becomes extremely laggy, I guess it conflicts with bluetooth somehow
 
USA-RedDragon

USA-RedDragon

Joined
Apr 24, 2018
Messages
4
Motherboard
Asrock Rack EP2C602
CPU
Dual Xeon E5-2670
Graphics
GTX 1060
Mobile Phone
  1. Android
Thanks for the clear and concise build log. Helped an idiot like me who's never used a Mac for more than a few days run it in a tri-boot setup. I do have a question for anyone using Dual E5-2670s, what were your args for SSDT generation? I have tried several things but always end up with a kernel panic.
 
Edge Of Eternity (Android buildbox gone Mac)
EP2C602-4L/D16 |  Xeon E5-2670 |  GeForce GTX 1060 3GB SC
teamawesome

teamawesome

Joined
Jan 28, 2018
Messages
128
Motherboard
ASRock EP2C602
CPU
2 x E5-2680 v2
Graphics
EVGA 980 Classified
Mobile Phone
  1. iOS
USA-RedDragon said:
Also since I can't imagine not mentioning being in the same state, greetings from Moore @teamawesome

Nice! I am in Del City. What settings have you tried so far? You get a KP each time?
 
teamawesome

teamawesome

Joined
Jan 28, 2018
Messages
128
Motherboard
ASRock EP2C602
CPU
2 x E5-2680 v2
Graphics
EVGA 980 Classified
Mobile Phone
  1. iOS

Please post the output from the ssdtPRGen.sh during generation. Also try removing the target flag and adding "-m 'MacPro6,1'".
 
USA-RedDragon

USA-RedDragon

Joined
Apr 24, 2018
Messages
4
Motherboard
Asrock Rack EP2C602
CPU
Dual Xeon E5-2670
Graphics
GTX 1060
Mobile Phone
  1. Android
teamawesome said:
Please post the output from the ssdtPRGen.sh during generation

Code: 
Jacobs-Mac-Pro:~ reddragon$ ~/ssdtPRGen.sh -b Mac-F60DEB81FF30ACF6 -cpus 2 -mode custom -p 'E5-2670' -target 0

ssdtPRGen.sh v0.9  Copyright (c) 2011-2012 by † RevoGirl
             v6.6  Copyright (c) 2013 by † Jeroen
             v21.5 Copyright (c) 2013-2018 by Pike R. Alpha
-----------------------------------------------------------
Bugs > https://github.com/Piker-Alpha/ssdtPRGen.sh/issues <
/Users/reddragon/ssdtPRGen.sh: line 3877: /Users/reddragon/Library/ssdtPRGen/Data/Versions.cfg: No such file or directory

System information: Mac OS X 10.13.4 (17E202)
Brandstring: "Intel(R) Xeon(R) CPU E5-2670 0 @ 2.60GHz"

Override value: (-b) board-id, now using: Mac-F60DEB81FF30ACF6!
Override value: (-cpus) number of processors, now using: 2!
Override value: (-mode) script mode changed to custom!
Override value: (-p) processor model, now using: E5-2670!
Override value: (-target) CPU, now using: Sandy Bridge!

grep: /Users/reddragon/Library/ssdtPRGen/ACPI/SSDT*.aml: No such file or directory
Notice: Downloading User Defined.cfg ...
Notice: Downloading Sandy Bridge.cfg ...
Version: models.cfg v171 / Sandy Bridge.cfg v150




Notice: Custom mode enabled
   Skipping ACPI table extraction from host computer!
   Getting enabled Processors from...: /Users/reddragon/Desktop/APIC.aml
   Getting Processor declaration from: /Users/reddragon/Desktop/DSDT.aml
   Used ACPI processor labels:
   – C000 C001 C002 C003 C004 C005 C006 C007 C008 C009 C00A C00B C00C C00D C00E C00F
   – C100 C101 C102 C103 C104 C105 C106 C107 C108 C109 C10A C10B C10C C10D C10E C10F

Notice: Downloading Restrictions.cfg ...
Generating ssdt.dsl for a 'MacPro6,1' with board-id [Mac-F60DEB81FF30ACF6]
Sandy Bridge Core E5-2670 processor [0x206D7] setup [0x0a01]
With a maximum TDP of 115 Watt, as specified by Intel
Number logical CPU's: 32 (Core Frequency: 2600 MHz)
Number of Turbo States: 7 (2700-3300 MHz)
Number of P-States: 22 (1200-3300 MHz)
Injected C-States for C000 (C1,C3,C6,C7)

Error: board-id [Mac-F60DEB81FF30ACF6] not supported by Sandy Bridge – check SMBIOS data / use the -target option

Do you want to continue (y/n)? y
Warning: 'system-type' may be set improperly (1 instead of 2)
    - Clover users should read https://clover-wiki.zetam.org/Configuration/ACPI#acpi_smartupsNotice: Downloading iasl.zip ...

Compiling: ssdt_pr.dsl
Intel ACPI Component Architecture
ASL Optimizing Compiler version 20140926-64 [Nov  6 2014]
Copyright (c) 2000 - 2014 Intel Corporation

ASL Input:     /Users/reddragon/Library/ssdtPRGen/ssdt.dsl - 593 lines, 16745 bytes, 150 keywords
AML Output:    /Users/reddragon/Library/ssdtPRGen/ssdt.aml - 4479 bytes, 69 named objects, 81 executable opcodes

Compilation complete. 0 Errors, 0 Warnings, 0 Remarks, 0 Optimizations
Do you want to open ssdt.dsl (y/n)? n



teamawesome said:
Also try removing the target flag and adding "-m 'MacPro6,1'".
Code: 
Jacobs-Mac-Pro:~ reddragon$ ~/ssdtPRGen.sh -b Mac-F60DEB81FF30ACF6 -cpus 2 -mode custom -p 'E5-2670' -m 'MacPro6,1'

ssdtPRGen.sh v0.9  Copyright (c) 2011-2012 by † RevoGirl
             v6.6  Copyright (c) 2013 by † Jeroen
             v21.5 Copyright (c) 2013-2018 by Pike R. Alpha
-----------------------------------------------------------
Bugs > https://github.com/Piker-Alpha/ssdtPRGen.sh/issues <

System information: Mac OS X 10.13.4 (17E202)
Brandstring: "Intel(R) Xeon(R) CPU E5-2670 0 @ 2.60GHz"

Override value: (-b) board-id, now using: Mac-F60DEB81FF30ACF6!
Override value: (-cpus) number of processors, now using: 2!
Override value: (-mode) script mode changed to custom!
Override value: (-p) processor model, now using: E5-2670!
Override value: (-m) model, now using: MacPro6,1!

grep: /Users/reddragon/Library/ssdtPRGen/ACPI/SSDT*.aml: No such file or directory
Version: models.cfg v171 / Sandy Bridge.cfg v150




Notice: Custom mode enabled
   Skipping ACPI table extraction from host computer!
   Getting enabled Processors from...: /Users/reddragon/Desktop/APIC.aml
   Getting Processor declaration from: /Users/reddragon/Desktop/DSDT.aml
   Used ACPI processor labels:
   – C000 C001 C002 C003 C004 C005 C006 C007 C008 C009 C00A C00B C00C C00D C00E C00F
   – C100 C101 C102 C103 C104 C105 C106 C107 C108 C109 C10A C10B C10C C10D C10E C10F

Generating ssdt.dsl for a 'MacPro6,1' with board-id [Mac-F60DEB81FF30ACF6]
Sandy Bridge Core E5-2670 processor [0x206D7] setup [0x0a01]
With a maximum TDP of 115 Watt, as specified by Intel
Number logical CPU's: 32 (Core Frequency: 2600 MHz)
Number of Turbo States: 7 (2700-3300 MHz)
Number of P-States: 22 (1200-3300 MHz)
Injected C-States for C000 (C1,C3,C6,C7)

Error: board-id [Mac-F60DEB81FF30ACF6] not supported by Sandy Bridge – check SMBIOS data / use the -target option

Do you want to continue (y/n)? y
Warning: 'system-type' may be set improperly (1 instead of 2)
    - Clover users should read https://clover-wiki.zetam.org/Configuration/ACPI#acpi_smartups
Compiling: ssdt_pr.dsl
Intel ACPI Component Architecture
ASL Optimizing Compiler version 20140926-64 [Nov  6 2014]
Copyright (c) 2000 - 2014 Intel Corporation

ASL Input:     /Users/reddragon/Library/ssdtPRGen/ssdt.dsl - 593 lines, 16745 bytes, 150 keywords
AML Output:    /Users/reddragon/Library/ssdtPRGen/ssdt.aml - 4479 bytes, 69 named objects, 81 executable opcodes

Compilation complete. 0 Errors, 0 Warnings, 0 Remarks, 0 Optimizations
Do you want to open ssdt.dsl (y/n)? n

Second run also caused a panic about 20 secs after logging in

Edit: both runs resulted in the exact same files being generated

Edit 2: In case by output you meant ssdt.dsl:
Code: 
/*
 * Intel ACPI Component Architecture
 * AML Disassembler version 20140210-00 [Feb 10 2014]
 * Copyright (c) 2000 - 2014 Intel Corporation
 *
 * Original Table Header:
 *     Signature        "SSDT"
 *     Length           0x0000036A (874)
 *     Revision         0x01
 *     Checksum         0x00
 *     OEM ID           "APPLE "
 *     OEM Table ID     "CpuPm"
 *     OEM Revision     0x00021500 (136448)
 *     Compiler ID      "INTL"
 *     Compiler Version 0x20140210 (538182160)
 */

DefinitionBlock ("ssdt.aml", "SSDT", 1, "APPLE ", "CpuPm", 0x00021500)
{
    /* Device(\_SB_.SCK0) */
    External (\_SB_.SCK0.C000, DeviceObj)
    External (\_SB_.SCK0.C001, DeviceObj)
    External (\_SB_.SCK0.C002, DeviceObj)
    External (\_SB_.SCK0.C003, DeviceObj)
    External (\_SB_.SCK0.C004, DeviceObj)
    External (\_SB_.SCK0.C005, DeviceObj)
    External (\_SB_.SCK0.C006, DeviceObj)
    External (\_SB_.SCK0.C007, DeviceObj)
    External (\_SB_.SCK0.C008, DeviceObj)
    External (\_SB_.SCK0.C009, DeviceObj)
    External (\_SB_.SCK0.C00A, DeviceObj)
    External (\_SB_.SCK0.C00B, DeviceObj)
    External (\_SB_.SCK0.C00C, DeviceObj)
    External (\_SB_.SCK0.C00D, DeviceObj)
    External (\_SB_.SCK0.C00E, DeviceObj)
    External (\_SB_.SCK0.C00F, DeviceObj)
    /* Device(\_SB_.SCK1) */
    External (\_SB_.SCK1.C100, DeviceObj)
    External (\_SB_.SCK1.C101, DeviceObj)
    External (\_SB_.SCK1.C102, DeviceObj)
    External (\_SB_.SCK1.C103, DeviceObj)
    External (\_SB_.SCK1.C104, DeviceObj)
    External (\_SB_.SCK1.C105, DeviceObj)
    External (\_SB_.SCK1.C106, DeviceObj)
    External (\_SB_.SCK1.C107, DeviceObj)
    External (\_SB_.SCK1.C108, DeviceObj)
    External (\_SB_.SCK1.C109, DeviceObj)
    External (\_SB_.SCK1.C10A, DeviceObj)
    External (\_SB_.SCK1.C10B, DeviceObj)
    External (\_SB_.SCK1.C10C, DeviceObj)
    External (\_SB_.SCK1.C10D, DeviceObj)
    External (\_SB_.SCK1.C10E, DeviceObj)
    External (\_SB_.SCK1.C10F, DeviceObj)

    Scope (\_SB_.SCK0.C000)
    {
        Method (_INI, 0, NotSerialized)
        {
            Store ("ssdtPRGen version.....: 21.5 / Mac OS X 10.13.4 (17E202)", Debug)
            Store ("custom mode...........: 1", Debug)
            Store ("host processor........: Intel(R) Xeon(R) CPU E5-2670 0 @ 2.60GHz", Debug)
            Store ("target processor......: E5-2670", Debug)
            Store ("number of processors..: 2", Debug)
            Store ("baseFrequency.........: 1200", Debug)
            Store ("frequency.............: 2600", Debug)
            Store ("busFrequency..........: 100", Debug)
            Store ("logicalCPUs...........: 32", Debug)
            Store ("maximum TDP...........: 115", Debug)
            Store ("packageLength.........: 22", Debug)
            Store ("turboStates...........: 7", Debug)
            Store ("maxTurboFrequency.....: 3300", Debug)
            Store ("machdep.xcpm.mode.....: 0", Debug)
            Store ("number of ACPI scopes.: 2", Debug)
        }

        Name (APSN, 0x07)
        Name (APSS, Package (0x16)
        {
            /* High Frequency Modes (turbo) */
            Package (0x06) { 0x0CE4, 0x01C138, 0x0A, 0x0A, 0x2100, 0x2100 },
            Package (0x06) { 0x0C80, 0x01C138, 0x0A, 0x0A, 0x2000, 0x2000 },
            Package (0x06) { 0x0C1C, 0x01C138, 0x0A, 0x0A, 0x1F00, 0x1F00 },
            Package (0x06) { 0x0BB8, 0x01C138, 0x0A, 0x0A, 0x1E00, 0x1E00 },
            Package (0x06) { 0x0B54, 0x01C138, 0x0A, 0x0A, 0x1D00, 0x1D00 },
            Package (0x06) { 0x0AF0, 0x01C138, 0x0A, 0x0A, 0x1C00, 0x1C00 },
            Package (0x06) { 0x0A8C, 0x01C138, 0x0A, 0x0A, 0x1B00, 0x1B00 },
            /* High Frequency Modes (non-turbo) */
            Package (0x06) { 0x0A28, 0x01C138, 0x0A, 0x0A, 0x1A00, 0x1A00 },
            Package (0x06) { 0x09C4, 0x01AB0B, 0x0A, 0x0A, 0x1900, 0x1900 },
            Package (0x06) { 0x0960, 0x01954A, 0x0A, 0x0A, 0x1800, 0x1800 },
            Package (0x06) { 0x08FC, 0x017FF3, 0x0A, 0x0A, 0x1700, 0x1700 },
            Package (0x06) { 0x0898, 0x016B06, 0x0A, 0x0A, 0x1600, 0x1600 },
            Package (0x06) { 0x0834, 0x015681, 0x0A, 0x0A, 0x1500, 0x1500 },
            Package (0x06) { 0x07D0, 0x014264, 0x0A, 0x0A, 0x1400, 0x1400 },
            Package (0x06) { 0x076C, 0x012EAE, 0x0A, 0x0A, 0x1300, 0x1300 },
            Package (0x06) { 0x0708, 0x011B5D, 0x0A, 0x0A, 0x1200, 0x1200 },
            Package (0x06) { 0x06A4, 0x010872, 0x0A, 0x0A, 0x1100, 0x1100 },
            Package (0x06) { 0x0640, 0x00F5EB, 0x0A, 0x0A, 0x1000, 0x1000 },
            Package (0x06) { 0x05DC, 0x00E3C8, 0x0A, 0x0A, 0x0F00, 0x0F00 },
            Package (0x06) { 0x0578, 0x00D206, 0x0A, 0x0A, 0x0E00, 0x0E00 },
            Package (0x06) { 0x0514, 0x00C0A7, 0x0A, 0x0A, 0x0D00, 0x0D00 },
            /* Low Frequency Mode */
            Package (0x06) { 0x04B0, 0x00AFA8, 0x0A, 0x0A, 0x0C00, 0x0C00 }
        })

        Method (ACST, 0, NotSerialized)
        {
            Store ("Method _SB_.SCK0.C000.ACST Called", Debug)
            Store ("C000 C-States    : 29", Debug)

            /* Low Power Modes for C000 */
            Return (Package (0x06)
            {
                One,
                0x04,
                Package (0x04)
                {
                    ResourceTemplate ()
                    {
                        Register (FFixedHW,
                            0x01,               // Bit Width
                            0x02,               // Bit Offset
                            0x0000000000000000, // Address
                            0x01,               // Access Size
                            )
                    },
                    One,
                    Zero,
                    0x03E8
                },

                Package (0x04)
                {
                    ResourceTemplate ()
                    {
                        Register (FFixedHW,
                            0x01,               // Bit Width
                            0x02,               // Bit Offset
                            0x0000000000000010, // Address
                            0x03,               // Access Size
                            )
                    },
                    0x03,
                    0xCD,
                    0x01F4
                },

                Package (0x04)
                {
                    ResourceTemplate ()
                    {
                        Register (FFixedHW,
                            0x01,               // Bit Width
                            0x02,               // Bit Offset
                            0x0000000000000020, // Address
                            0x03,               // Access Size
                            )
                    },
                    0x06,
                    0xF5,
                    0x015E
                },

                Package (0x04)
                {
                    ResourceTemplate ()
                    {
                        Register (FFixedHW,
                            0x01,               // Bit Width
                            0x02,               // Bit Offset
                            0x0000000000000030, // Address
                            0x03,               // Access Size
                            )
                    },
                    0x07,
                    0xF5,
                    0xC8
                }
            })
        }
    }

    Scope (\_SB_.SCK0.C001)
    {
        Method (APSS, 0, NotSerialized)
        {
            Store ("Method _SB_.SCK0.C001.APSS Called", Debug)

            Return (\_SB_.SCK0.C000.APSS)
        }
    }

    Scope (\_SB_.SCK0.C002)
    {
        Method (APSS, 0, NotSerialized)
        {
            Store ("Method _SB_.SCK0.C002.APSS Called", Debug)

            Return (\_SB_.SCK0.C000.APSS)
        }
    }

    Scope (\_SB_.SCK0.C003)
    {
        Method (APSS, 0, NotSerialized)
        {
            Store ("Method _SB_.SCK0.C003.APSS Called", Debug)

            Return (\_SB_.SCK0.C000.APSS)
        }
    }

    Scope (\_SB_.SCK0.C004)
    {
        Method (APSS, 0, NotSerialized)
        {
            Store ("Method _SB_.SCK0.C004.APSS Called", Debug)

            Return (\_SB_.SCK0.C000.APSS)
        }
    }

    Scope (\_SB_.SCK0.C005)
    {
        Method (APSS, 0, NotSerialized)
        {
            Store ("Method _SB_.SCK0.C005.APSS Called", Debug)

            Return (\_SB_.SCK0.C000.APSS)
        }
    }

    Scope (\_SB_.SCK0.C006)
    {
        Method (APSS, 0, NotSerialized)
        {
            Store ("Method _SB_.SCK0.C006.APSS Called", Debug)

            Return (\_SB_.SCK0.C000.APSS)
        }
    }

    Scope (\_SB_.SCK0.C007)
    {
        Method (APSS, 0, NotSerialized)
        {
            Store ("Method _SB_.SCK0.C007.APSS Called", Debug)

            Return (\_SB_.SCK0.C000.APSS)
        }
    }

    Scope (\_SB_.SCK0.C008)
    {
        Method (APSS, 0, NotSerialized)
        {
            Store ("Method _SB_.SCK0.C008.APSS Called", Debug)

            Return (\_SB_.SCK0.C000.APSS)
        }
    }

    Scope (\_SB_.SCK0.C009)
    {
        Method (APSS, 0, NotSerialized)
        {
            Store ("Method _SB_.SCK0.C009.APSS Called", Debug)

            Return (\_SB_.SCK0.C000.APSS)
        }
    }

    Scope (\_SB_.SCK0.C00A)
    {
        Method (APSS, 0, NotSerialized)
        {
            Store ("Method _SB_.SCK0.C00A.APSS Called", Debug)

            Return (\_SB_.SCK0.C000.APSS)
        }
    }

    Scope (\_SB_.SCK0.C00B)
    {
        Method (APSS, 0, NotSerialized)
        {
            Store ("Method _SB_.SCK0.C00B.APSS Called", Debug)

            Return (\_SB_.SCK0.C000.APSS)
        }
    }

    Scope (\_SB_.SCK0.C00C)
    {
        Method (APSS, 0, NotSerialized)
        {
            Store ("Method _SB_.SCK0.C00C.APSS Called", Debug)

            Return (\_SB_.SCK0.C000.APSS)
        }
    }

    Scope (\_SB_.SCK0.C00D)
    {
        Method (APSS, 0, NotSerialized)
        {
            Store ("Method _SB_.SCK0.C00D.APSS Called", Debug)

            Return (\_SB_.SCK0.C000.APSS)
        }
    }

    Scope (\_SB_.SCK0.C00E)
    {
        Method (APSS, 0, NotSerialized)
        {
            Store ("Method _SB_.SCK0.C00E.APSS Called", Debug)

            Return (\_SB_.SCK0.C000.APSS)
        }
    }

    Scope (\_SB_.SCK0.C00F)
    {
        Method (APSS, 0, NotSerialized)
        {
            Store ("Method _SB_.SCK0.C00F.APSS Called", Debug)

            Return (\_SB_.SCK0.C000.APSS)
        }
    }

    Scope (\_SB_.SCK1.C100)
    {
        Name (APSN, 0x07)
        Name (APSS, Package (0x16)
        {
            /* High Frequency Modes (turbo) */
            Package (0x06) { 0x0CE4, 0x01C138, 0x0A, 0x0A, 0x2100, 0x2100 },
            Package (0x06) { 0x0C80, 0x01C138, 0x0A, 0x0A, 0x2000, 0x2000 },
            Package (0x06) { 0x0C1C, 0x01C138, 0x0A, 0x0A, 0x1F00, 0x1F00 },
            Package (0x06) { 0x0BB8, 0x01C138, 0x0A, 0x0A, 0x1E00, 0x1E00 },
            Package (0x06) { 0x0B54, 0x01C138, 0x0A, 0x0A, 0x1D00, 0x1D00 },
            Package (0x06) { 0x0AF0, 0x01C138, 0x0A, 0x0A, 0x1C00, 0x1C00 },
            Package (0x06) { 0x0A8C, 0x01C138, 0x0A, 0x0A, 0x1B00, 0x1B00 },
            /* High Frequency Modes (non-turbo) */
            Package (0x06) { 0x0A28, 0x01C138, 0x0A, 0x0A, 0x1A00, 0x1A00 },
            Package (0x06) { 0x09C4, 0x01AB0B, 0x0A, 0x0A, 0x1900, 0x1900 },
            Package (0x06) { 0x0960, 0x01954A, 0x0A, 0x0A, 0x1800, 0x1800 },
            Package (0x06) { 0x08FC, 0x017FF3, 0x0A, 0x0A, 0x1700, 0x1700 },
            Package (0x06) { 0x0898, 0x016B06, 0x0A, 0x0A, 0x1600, 0x1600 },
            Package (0x06) { 0x0834, 0x015681, 0x0A, 0x0A, 0x1500, 0x1500 },
            Package (0x06) { 0x07D0, 0x014264, 0x0A, 0x0A, 0x1400, 0x1400 },
            Package (0x06) { 0x076C, 0x012EAE, 0x0A, 0x0A, 0x1300, 0x1300 },
            Package (0x06) { 0x0708, 0x011B5D, 0x0A, 0x0A, 0x1200, 0x1200 },
            Package (0x06) { 0x06A4, 0x010872, 0x0A, 0x0A, 0x1100, 0x1100 },
            Package (0x06) { 0x0640, 0x00F5EB, 0x0A, 0x0A, 0x1000, 0x1000 },
            Package (0x06) { 0x05DC, 0x00E3C8, 0x0A, 0x0A, 0x0F00, 0x0F00 },
            Package (0x06) { 0x0578, 0x00D206, 0x0A, 0x0A, 0x0E00, 0x0E00 },
            Package (0x06) { 0x0514, 0x00C0A7, 0x0A, 0x0A, 0x0D00, 0x0D00 },
            /* Low Frequency Mode */
            Package (0x06) { 0x04B0, 0x00AFA8, 0x0A, 0x0A, 0x0C00, 0x0C00 }
        })

        Method (ACST, 0, NotSerialized)
        {
            Store ("Method _SB_.SCK1.C000.ACST Called", Debug)
            Store ("C000 C-States    : 29", Debug)

            /* Low Power Modes for C000 */
            Return (Package (0x06)
            {
                One,
                0x04,
                Package (0x04)
                {
                    ResourceTemplate ()
                    {
                        Register (FFixedHW,
                            0x01,               // Bit Width
                            0x02,               // Bit Offset
                            0x0000000000000000, // Address
                            0x01,               // Access Size
                            )
                    },
                    One,
                    Zero,
                    0x03E8
                },

                Package (0x04)
                {
                    ResourceTemplate ()
                    {
                        Register (FFixedHW,
                            0x01,               // Bit Width
                            0x02,               // Bit Offset
                            0x0000000000000010, // Address
                            0x03,               // Access Size
                            )
                    },
                    0x03,
                    0xCD,
                    0x01F4
                },

                Package (0x04)
                {
                    ResourceTemplate ()
                    {
                        Register (FFixedHW,
                            0x01,               // Bit Width
                            0x02,               // Bit Offset
                            0x0000000000000020, // Address
                            0x03,               // Access Size
                            )
                    },
                    0x06,
                    0xF5,
                    0x015E
                },

                Package (0x04)
                {
                    ResourceTemplate ()
                    {
                        Register (FFixedHW,
                            0x01,               // Bit Width
                            0x02,               // Bit Offset
                            0x0000000000000030, // Address
                            0x03,               // Access Size
                            )
                    },
                    0x07,
                    0xF5,
                    0xC8
                }
            })
        }
    }

    Scope (\_SB_.SCK1.C101)
    {
        Method (APSS, 0, NotSerialized)
        {
            Store ("Method _SB_.SCK1.C101.APSS Called", Debug)

            Return (\_SB_.SCK1.C100.APSS)
        }
    }

    Scope (\_SB_.SCK1.C102)
    {
        Method (APSS, 0, NotSerialized)
        {
            Store ("Method _SB_.SCK1.C102.APSS Called", Debug)

            Return (\_SB_.SCK1.C100.APSS)
        }
    }

    Scope (\_SB_.SCK1.C103)
    {
        Method (APSS, 0, NotSerialized)
        {
            Store ("Method _SB_.SCK1.C103.APSS Called", Debug)

            Return (\_SB_.SCK1.C100.APSS)
        }
    }

    Scope (\_SB_.SCK1.C104)
    {
        Method (APSS, 0, NotSerialized)
        {
            Store ("Method _SB_.SCK1.C104.APSS Called", Debug)

            Return (\_SB_.SCK1.C100.APSS)
        }
    }

    Scope (\_SB_.SCK1.C105)
    {
        Method (APSS, 0, NotSerialized)
        {
            Store ("Method _SB_.SCK1.C105.APSS Called", Debug)

            Return (\_SB_.SCK1.C100.APSS)
        }
    }

    Scope (\_SB_.SCK1.C106)
    {
        Method (APSS, 0, NotSerialized)
        {
            Store ("Method _SB_.SCK1.C106.APSS Called", Debug)

            Return (\_SB_.SCK1.C100.APSS)
        }
    }

    Scope (\_SB_.SCK1.C107)
    {
        Method (APSS, 0, NotSerialized)
        {
            Store ("Method _SB_.SCK1.C107.APSS Called", Debug)

            Return (\_SB_.SCK1.C100.APSS)
        }
    }

    Scope (\_SB_.SCK1.C108)
    {
        Method (APSS, 0, NotSerialized)
        {
            Store ("Method _SB_.SCK1.C108.APSS Called", Debug)

            Return (\_SB_.SCK1.C100.APSS)
        }
    }

    Scope (\_SB_.SCK1.C109)
    {
        Method (APSS, 0, NotSerialized)
        {
            Store ("Method _SB_.SCK1.C109.APSS Called", Debug)

            Return (\_SB_.SCK1.C100.APSS)
        }
    }

    Scope (\_SB_.SCK1.C10A)
    {
        Method (APSS, 0, NotSerialized)
        {
            Store ("Method _SB_.SCK1.C10A.APSS Called", Debug)

            Return (\_SB_.SCK1.C100.APSS)
        }
    }

    Scope (\_SB_.SCK1.C10B)
    {
        Method (APSS, 0, NotSerialized)
        {
            Store ("Method _SB_.SCK1.C10B.APSS Called", Debug)

            Return (\_SB_.SCK1.C100.APSS)
        }
    }

    Scope (\_SB_.SCK1.C10C)
    {
        Method (APSS, 0, NotSerialized)
        {
            Store ("Method _SB_.SCK1.C10C.APSS Called", Debug)

            Return (\_SB_.SCK1.C100.APSS)
        }
    }

    Scope (\_SB_.SCK1.C10D)
    {
        Method (APSS, 0, NotSerialized)
        {
            Store ("Method _SB_.SCK1.C10D.APSS Called", Debug)

            Return (\_SB_.SCK1.C100.APSS)
        }
    }

    Scope (\_SB_.SCK1.C10E)
    {
        Method (APSS, 0, NotSerialized)
        {
            Store ("Method _SB_.SCK1.C10E.APSS Called", Debug)

            Return (\_SB_.SCK1.C100.APSS)
        }
    }

    Scope (\_SB_.SCK1.C10F)
    {
        Method (APSS, 0, NotSerialized)
        {
            Store ("Method _SB_.SCK1.C10F.APSS Called", Debug)

            Return (\_SB_.SCK1.C100.APSS)
        }
    }
}

Edit 3: In case it matters, I'm running the mod_EP2C6021.89I.patched bios
 
Last edited:
Edge Of Eternity (Android buildbox gone Mac)
EP2C602-4L/D16 |  Xeon E5-2670 |  GeForce GTX 1060 3GB SC
meltman

meltman

Joined
Mar 24, 2011
Messages
100
Motherboard
Asrock EP2C602
CPU
Dual E5-2650 v2
Graphics
GTX 970
Mac
  1. MacBook Pro
  2. Mac Pro
Mobile Phone
  1. iOS
Thanks for the excellent guide teamawesome!

I have a question regarding your power management - is XCPM enabled on your hackintosh?

I've been struggling to get it to enable in High Sierra.
 
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