GBDK 2020 Docs
API Documentation for GBDK 2020
hardware.h File Reference
#include <types.h>

Go to the source code of this file.

Macros

#define __REG   extern volatile __sfr
 

Variables

__REG P1_REG
 
__REG SB_REG
 
__REG SC_REG
 
__REG DIV_REG
 
__REG TIMA_REG
 
__REG TMA_REG
 
__REG TAC_REG
 
__REG IF_REG
 
__REG NR10_REG
 
__REG NR11_REG
 
__REG NR12_REG
 
__REG NR13_REG
 
__REG NR14_REG
 
__REG NR21_REG
 
__REG NR22_REG
 
__REG NR23_REG
 
__REG NR24_REG
 
__REG NR30_REG
 
__REG NR31_REG
 
__REG NR32_REG
 
__REG NR33_REG
 
__REG NR34_REG
 
__REG NR41_REG
 
__REG NR42_REG
 
__REG NR43_REG
 
__REG NR44_REG
 
__REG NR50_REG
 
__REG NR51_REG
 
__REG NR52_REG
 
__REG LCDC_REG
 
__REG STAT_REG
 
__REG SCY_REG
 
__REG SCX_REG
 
__REG LY_REG
 
__REG LYC_REG
 
__REG DMA_REG
 
__REG BGP_REG
 
__REG OBP0_REG
 
__REG OBP1_REG
 
__REG WY_REG
 
__REG WX_REG
 
__REG KEY1_REG
 
__REG VBK_REG
 
__REG HDMA1_REG
 
__REG HDMA2_REG
 
__REG HDMA3_REG
 
__REG HDMA4_REG
 
__REG HDMA5_REG
 
__REG RP_REG
 
__REG BCPS_REG
 
__REG BCPD_REG
 
__REG OCPS_REG
 
__REG OCPD_REG
 
__REG SVBK_REG
 
__REG IE_REG
 

Detailed Description

Defines that let the GB's hardware registers be accessed from C.

See the Pandocs for more details on each register.

Macro Definition Documentation

◆ __REG

#define __REG   extern volatile __sfr

Variable Documentation

◆ P1_REG

__REG P1_REG

Joystick: 1.1.P15.P14.P13.P12.P11.P10

◆ SB_REG

__REG SB_REG

Serial IO data buffer

◆ SC_REG

__REG SC_REG

Serial IO control register

◆ DIV_REG

__REG DIV_REG

Divider register

◆ TIMA_REG

__REG TIMA_REG

Timer counter

◆ TMA_REG

__REG TMA_REG

Timer modulo

◆ TAC_REG

__REG TAC_REG

Timer control

◆ IF_REG

__REG IF_REG

Interrupt flags: 0.0.0.JOY.SIO.TIM.LCD.VBL

◆ NR10_REG

__REG NR10_REG

Sound Channel 1 Sweep

◆ NR11_REG

__REG NR11_REG

Sound Channel 1 Sound length/Wave pattern duty

◆ NR12_REG

__REG NR12_REG

Sound Channel 1 Volume Envelope

◆ NR13_REG

__REG NR13_REG

Sound Channel 1 Frequency Low

◆ NR14_REG

__REG NR14_REG

Sound Channel 1 Frequency High

◆ NR21_REG

__REG NR21_REG

Sound Channel 2 Tone

◆ NR22_REG

__REG NR22_REG

Sound Channel 2 Volume Envelope

◆ NR23_REG

__REG NR23_REG

Sound Channel 2 Frequency data Low

◆ NR24_REG

__REG NR24_REG

Sound Channel 2 Frequency data High

◆ NR30_REG

__REG NR30_REG

Sound Channel 3 Sound on/off

◆ NR31_REG

__REG NR31_REG

Sound Channel 3 Sound Length

◆ NR32_REG

__REG NR32_REG

Sound Channel 3 Select output level

◆ NR33_REG

__REG NR33_REG

Sound Channel 3 Frequency data Low

◆ NR34_REG

__REG NR34_REG

Sound Channel 3 Frequency data High

◆ NR41_REG

__REG NR41_REG

Sound Channel 4 Sound Length

◆ NR42_REG

__REG NR42_REG

Sound Channel 4 Volume Envelope

◆ NR43_REG

__REG NR43_REG

Sound Channel 4 Polynomial Counter

◆ NR44_REG

__REG NR44_REG

Sound Channel 4 Counter / Consecutive and Inital

◆ NR50_REG

__REG NR50_REG

Sound Channel control / ON-OFF / Volume

◆ NR51_REG

__REG NR51_REG

Sound Selection of Sound output terminal

◆ NR52_REG

__REG NR52_REG

Sound Master on/off

◆ LCDC_REG

__REG LCDC_REG

LCD control

◆ STAT_REG

__REG STAT_REG

LCD status

◆ SCY_REG

__REG SCY_REG

Scroll Y

◆ SCX_REG

__REG SCX_REG

Scroll X

◆ LY_REG

__REG LY_REG

LCDC Y-coordinate

◆ LYC_REG

__REG LYC_REG

LY compare

◆ DMA_REG

__REG DMA_REG

DMA transfer

◆ BGP_REG

__REG BGP_REG

BG palette data

◆ OBP0_REG

__REG OBP0_REG

OBJ palette 0 data

◆ OBP1_REG

__REG OBP1_REG

OBJ palette 1 data

◆ WY_REG

__REG WY_REG

Window Y coordinate

◆ WX_REG

__REG WX_REG

Window X coordinate

◆ KEY1_REG

__REG KEY1_REG

CPU speed

◆ VBK_REG

__REG VBK_REG

VRAM bank

◆ HDMA1_REG

__REG HDMA1_REG

DMA control 1

◆ HDMA2_REG

__REG HDMA2_REG

DMA control 2

◆ HDMA3_REG

__REG HDMA3_REG

DMA control 3

◆ HDMA4_REG

__REG HDMA4_REG

DMA control 4

◆ HDMA5_REG

__REG HDMA5_REG

DMA control 5

◆ RP_REG

__REG RP_REG

IR port

◆ BCPS_REG

__REG BCPS_REG

BG color palette specification

◆ BCPD_REG

__REG BCPD_REG

BG color palette data

◆ OCPS_REG

__REG OCPS_REG

OBJ color palette specification

◆ OCPD_REG

__REG OCPD_REG

OBJ color palette data

◆ SVBK_REG

__REG SVBK_REG

WRAM bank

◆ IE_REG

__REG IE_REG

Interrupt enable